Gidel Announces Developer Tools for Intel HLS

New toolkit supports C++ optimization for FPGAs.

Gidel has announced an application support package for Intel’s HLS compiler. HLS is designed to take “untimed C++ as input and generate production-quality register transfer level (RTL) code that is optimized for Intel Field Programmable Gate Arrays (FPGAs).” The new developer tools, which Gidel says are the first to market for this kind of HLS support, “… produce speed increases of up to 5X over prior FPGA development options.”

According to the press announcement, “Standard HLS does not provide system middleware and board support, but simply accelerates FPGA code development; HLS is intended for traditional FPGA designers. Gidel’s development tools grant software developers easy access to the same level of OpenCL design for FPGA by tailoring the ASP(s), using C++ as the programing language. Developers of all types can now work faster and more efficiently, with the freedom to mix between C++ and HDL as most appropriate to the application.”